Manufacturer
Infineon
Description
CPLD Ultra37000 Family 15K Gates 512 Macro Cells 66MHz 3.3V 208-Pin CQFP
Datasheet
Type
Body Material
Clock Rate
Contact Plating
Frequency
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
RoHS
Schedule B
Terminal Pitch
Turn-On Delay Time
Width
Description
Ceramic
50 MHz
Gold
66 MHz
3.94 mm
28 mm
Obsolete (Last Updated: 8 months ago)
66 MHz
125 °C
3.6 V
EEPROM
-55 °C
3 V
Surface Mount
165
32
32
512
208
208
3.3 V
20 ns
No
Compliant
8542390000
500 µm
20 ns
28 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Body Material
Clock Rate
Contact Plating
Frequency
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
RoHS
Schedule B
Terminal Pitch
Turn-On Delay Time
Width
Description
Ceramic
50 MHz
Gold
66 MHz
3.94 mm
28 mm
Obsolete (Last Updated: 8 months ago)
66 MHz
125 °C
3.6 V
EEPROM
-55 °C
3 V
Surface Mount
165
32
32
512
208
208
3.3 V
20 ns
No
Compliant
8542390000
500 µm
20 ns
28 mm
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