Manufacturer
Intel / Altera
Description
CPLD MAX V Family 1700 Macro Cells 201.1MHz 1.8V 256-Pin TFBGA
Datasheet
Type
Case/Package
Clock Rate
Height - Seated (Max)
Length
Lifecycle Status
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of I/Os
Number of Inputs
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Terminal Pitch
Width
Description
FBGA
201.1 MHz
1.55 mm
17 mm
Production (Last Updated: 8 months ago)
85 °C
1.89 V
FLASH
0 °C
1.71 V
Surface Mount
203
203
2210
8
1700
203
256
256
1.8 V
11.2 ns
Yes
Non-Compliant
1 mm
17 mm
Ships in 7-10 days
Quantity
Unit Price
Ext. Price
Type
Case/Package
Clock Rate
Height - Seated (Max)
Length
Lifecycle Status
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of I/Os
Number of Inputs
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Terminal Pitch
Width
Description
FBGA
201.1 MHz
1.55 mm
17 mm
Production (Last Updated: 8 months ago)
85 °C
1.89 V
FLASH
0 °C
1.71 V
Surface Mount
203
203
2210
8
1700
203
256
256
1.8 V
11.2 ns
Yes
Non-Compliant
1 mm
17 mm
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