Manufacturer
Intel / Altera
Description
CPLD MAX 7000A Family 2.5K Gates 128 Macro Cells 129.9MHz CMOS Technology 3.3V 100-Pin TQFP
Datasheet
Type
Case/Package
China RoHS
Clock Rate
Height
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
TQFP
Compliant
129.9 MHz
1 mm
1.27 mm
Lead Free
14 mm
Obsolete (Last Updated: 8 months ago)
192.3 MHz
70 °C
3.6 V
EEPROM
0 °C
3 V
Surface Mount
2500
84
8
8
128
100
84
100
3.3 V
7.5 ns
No
Yes
Compliant
7
500 µm
7.5 ns
14 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
China RoHS
Clock Rate
Height
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
TQFP
Compliant
129.9 MHz
1 mm
1.27 mm
Lead Free
14 mm
Obsolete (Last Updated: 8 months ago)
192.3 MHz
70 °C
3.6 V
EEPROM
0 °C
3 V
Surface Mount
2500
84
8
8
128
100
84
100
3.3 V
7.5 ns
No
Yes
Compliant
7
500 µm
7.5 ns
14 mm
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