Manufacturer
Intel / Altera
Description
CPLD MAX 7000B Family 2.5K Gates 128 MacroCells 243.9MHz 2.5V 100-Pin TQFP Tray
Datasheet
Type
Case/Package
China RoHS
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
TQFP
Non-Compliant
243.9 MHz
333.33 MHz
1.27 mm
Contains Lead
14 mm
Obsolete (Last Updated: 8 months ago)
243.9 MHz
70 °C
2.625 V
EEPROM
0 °C
2.375 V
Surface Mount
2500
84
8
8
128
100
84
100
2.5 V
4 ns
Yes
Non-Compliant
4
500 µm
4 ns
14 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
China RoHS
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
TQFP
Non-Compliant
243.9 MHz
333.33 MHz
1.27 mm
Contains Lead
14 mm
Obsolete (Last Updated: 8 months ago)
243.9 MHz
70 °C
2.625 V
EEPROM
0 °C
2.375 V
Surface Mount
2500
84
8
8
128
100
84
100
2.5 V
4 ns
Yes
Non-Compliant
4
500 µm
4 ns
14 mm
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