Manufacturer
Intel / Altera
Description
CPLD MAX 7000 Family 3.75K Gates 192 Macro Cells 125MHz CMOS Technology 5 Volt 160-Pin CPGA
Datasheet
Type
Body Material
Clock Rate
Frequency
Height
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
Ceramic
125 MHz
125 MHz
3.56 mm
5.34 mm
39.624 mm
Obsolete (Last Updated: 8 months ago)
90.9 MHz
70 °C
5.25 V
EEPROM
0 °C
4.75 V
Surface Mount, Through Hole
3750
124
12
12
192
160
124
160
5 V
12 ns
No
Yes
Non-Compliant
12
2.54 mm
12 ns
39.624 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Body Material
Clock Rate
Frequency
Height
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
Ceramic
125 MHz
125 MHz
3.56 mm
5.34 mm
39.624 mm
Obsolete (Last Updated: 8 months ago)
90.9 MHz
70 °C
5.25 V
EEPROM
0 °C
4.75 V
Surface Mount, Through Hole
3750
124
12
12
192
160
124
160
5 V
12 ns
No
Yes
Non-Compliant
12
2.54 mm
12 ns
39.624 mm
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