Manufacturer
Intel / Altera
Description
CPLD MAX 7000A Family 5K Gates 256 Macro Cells 166.67MHz CMOS Technology 3.3 Volt 100-Pin FBGA
Datasheet
Type
Case/Package
China RoHS
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Packaging
Propagation Delay
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
FBGA
Non-Compliant
126.6 MHz
166.67 MHz
1.7 mm
Contains Lead
11 mm
Obsolete (Last Updated: 8 months ago)
172.4 MHz
85 °C
3.6 V
EEPROM
-40 °C
3 V
Surface Mount
5000
84
16
16
256
100
84
100
3.3 V
Bulk
7.5 ns
Yes
Non-Compliant
7
1 mm
7.5 ns
11 mm
Ships in 7-10 days
Quantity
Unit Price
Ext. Price
Type
Case/Package
China RoHS
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Packaging
Propagation Delay
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
FBGA
Non-Compliant
126.6 MHz
166.67 MHz
1.7 mm
Contains Lead
11 mm
Obsolete (Last Updated: 8 months ago)
172.4 MHz
85 °C
3.6 V
EEPROM
-40 °C
3 V
Surface Mount
5000
84
16
16
256
100
84
100
3.3 V
Bulk
7.5 ns
Yes
Non-Compliant
7
1 mm
7.5 ns
11 mm
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