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Manufacturer
Lattice Semiconductor
Description
CPLD ispMACH 4A Family 15K Gates 384 Macro Cells 83.3MHz/118MHz 3.3V 256-Pin FBGA Tray
Datasheet
Type
Case/Package
China RoHS
Clock Rate
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Schedule B
Terminal Pitch
Width
Description
FBGA
Compliant
62.5 MHz
2.1 mm
17 mm
EOL (Last Updated: 8 months ago)
100 MHz
70 °C
3.6 V
EEPROM
0 °C
3 V
Surface Mount
15000
192
384
256
160
256
3.3 V
10 ns
No
Yes
Compliant
8542390000, 8542390000|8542390000|8542390000|8542390000|8542390000
1 mm
17 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
China RoHS
Clock Rate
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Schedule B
Terminal Pitch
Width
Description
FBGA
Compliant
62.5 MHz
2.1 mm
17 mm
EOL (Last Updated: 8 months ago)
100 MHz
70 °C
3.6 V
EEPROM
0 °C
3 V
Surface Mount
15000
192
384
256
160
256
3.3 V
10 ns
No
Yes
Compliant
8542390000, 8542390000|8542390000|8542390000|8542390000|8542390000
1 mm
17 mm
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