Manufacturer
Lattice Semiconductor
Description
CPLD ispMACH 4A Family 5K Gates 128 Macro Cells 83.3MHz/118MHz 5V 100-Pin PQFP Tray
Datasheet
Type
Case/Package
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Schedule B
Terminal Pitch
Turn-On Delay Time
Weight
Width
Description
PQFP
62.5 MHz
100 MHz
3.4 mm
Lead Free
20 mm
Obsolete (Last Updated: 8 months ago)
100 MHz
70 °C
5.25 V
EEPROM
0 °C
4.75 V
Surface Mount
5000
64
128
64
100
100
5 V
10 ns
No
No
Non-Compliant
8542390000
500 µm
10 ns
1.758804 g
14 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Schedule B
Terminal Pitch
Turn-On Delay Time
Weight
Width
Description
PQFP
62.5 MHz
100 MHz
3.4 mm
Lead Free
20 mm
Obsolete (Last Updated: 8 months ago)
100 MHz
70 °C
5.25 V
EEPROM
0 °C
4.75 V
Surface Mount
5000
64
128
64
100
100
5 V
10 ns
No
No
Non-Compliant
8542390000
500 µm
10 ns
1.758804 g
14 mm
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