Manufacturer
AMD
Description
CPLD XC9500XL Family 6.4K Gates 288 Macro Cells 100MHz 0.35um (CMOS) Technology 3.3V 256-Pin FBGA
Datasheet
Type
Case/Package
Clock Rate
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Inputs
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Width
Description
BGA
100 MHz
2 mm
17 mm
Production (Last Updated: 8 months ago)
100 MHz
85 °C
3.6 V
FLASH
-40 °C
3 V
Surface Mount
6400
192
192
16
16
288
192
256
256
3.3 V
10 ns
No
Non-Compliant
10
1 mm
17 mm
MOQ : Unavailable
Minimum Qty : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
Clock Rate
Height - Seated (Max)
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Inputs
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Speed Grade
Terminal Pitch
Width
Description
BGA
100 MHz
2 mm
17 mm
Production (Last Updated: 8 months ago)
100 MHz
85 °C
3.6 V
FLASH
-40 °C
3 V
Surface Mount
6400
192
192
16
16
288
192
256
256
3.3 V
10 ns
No
Non-Compliant
10
1 mm
17 mm
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